View LTM8033_6941443.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LTM8033 1 8033f typical application features description ultralow noise emc 36v in , 3a dc/dc module regulator the ltm ? 8033 is an electromagnetic compatible (emc) 36v, 3a dc/dc module ? buck converter designed to meet the radiated emissions requirements of en55022. conducted emission requirements can be met by adding standard filter components. included in the package are the switching controller, power switches, inductor, filters and all support components. operating over an input voltage range of 3.6v to 36v, the LTM8033 supports an output voltage range of 0.8v to 24v, and a switching frequency range of 200khz to 2.4mhz, each set by a single resistor. only the bulk input and output filter capacitors are needed to finish the design. the LTM8033 is packaged in a thermally enhanced, com- pact (11.25mm 15mm 4.32mm) overmolded land grid array (lga) package suitable for automated assembly by standard surface mount equipment. l , lt, ltc, ltm, linear technology, the linear logo, module and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. ultralow noise 12v/3a dc/dc module regulator applications n complete step-down switch mode power supply n wide input voltage range: 3.6v to 36v n 3a output current n 0.8v to 24v output voltage n en55022 class b compliant n current share multiple LTM8033 regulators for more than 3a output n selectable switching frequency: 200khz to 2.4mhz n current mode control n (e4) rohs compliant package with gold pad finish n programmable soft-start n compact package (11.25mm 15mm 4.32mm) surface mount lga n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation emi performance 8033 ta01a v in run/ss fin share v in * 20v to 36v v out 12v 3a v out aux bias pgood rt LTM8033 2.2f sync gnd adj 1f f = 850khz 41.2k 34.8k 47f * running voltage range. please refer to the applications information section for start-up details. frequency (mhz) 30 814.8 716.7 618.6 520.5 226.2 324.3 422.4 0 10 30 20 60 50 40 70 80 912.9 1010 8033 ta01b 128.1
LTM8033 2 8033f pin configuration absolute maximum ratings v in , fin, run/ss voltage ........................................36v adj, rt, share voltage ............................................6v v out , aux ................................................................25v pgood, sync ..........................................................30v bias .........................................................................25v maximum junction temperature (note 2) .......... 125c solder temperature ............................................. 245c (note 1) lga package 76-lead (15mm s 11.25mm s 4.32mm) top view fgh l jk e abcd 2 1 4 3 5 6 7 8 bias run/ss aux pgood rt adj sync gnd share bank 4 bank 3 fin bank 2 gnd v in bank 1 v out t jmax = 125c, ja = 15.4c/w, jcbottom = 5.2c/w, jb = 9.8c/w, jctop = 16.7c/w values derived from a 4 layer 6.35cm 6.35cm pcb weight = 2.2g order information lead free finish tray part marking* package description temperature range LTM8033ev#pbf LTM8033ev#pbf 8033v 76-lead (15mm 11.25mm 4.32mm) lga C40c to 125c LTM8033iv#pbf LTM8033iv#pbf 8033v 76-lead (15mm 11.25mm 4.32mm) lga C40c to 125c LTM8033mpv#pbf LTM8033mpv#pbf 8033v 76-lead (15mm 11.25mm 4.32mm) lga C55c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a la bel on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ parameter conditions min typ max units minimum input voltage l 3.6 v output dc voltage 0 < i out < 3a, r adj open, v in = 24v 0 < i out < 3a, r adj = 16.5k, v in = 32v 0.8 24 v v output dc current v in = 24v 0 3 a quiescent current into v in run/ss = 0v not switching bias = 0v, not switching 0.01 30 100 1 60 150 a a a quiescent current into bias run/ss = 0v not switching bias = 0v, not switching 0.01 75 0 0.5 120 5 a a a line regulation 5.5v < v in < 36v 0.3 % load regulation 0a < i out < 3a, v in = 24v 0.4 % electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, run/ss = 12v unless otherwise noted (note 2).
LTM8033 3 8033f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTM8033e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c.v in = 12v, run/ss = 12v unless otherwise noted (note 2). parameter conditions min typ max units output rms voltage ripple v in = 24v, 0a < i out < 3a 5 mv switching frequency r t = 45.3k 780 khz voltage at adj pin l 775 790 805 mv current out of adj pin adj = 1v, v out = 0v 2 a minimum bias voltage for proper operation 2 2.8 v run/ss pin current run/ss = 2.5v 5 10 a run/ss input high voltage 2.5 v run/ss input low voltage 0.2 v pgood threshold (at adj) v out rising 730 mv pgood leakage current pgood = 30v, run/ss = 0v 0.1 1 a pgood sink current pgood = 0.4v 200 735 a sync input low threshold f sync = 550khz 0.5 v sync input high threshold f sync = 550khz 0.7 v sync bias current sync = 0v 0.1 a 500khz narrowband conducted emissions 24v in , 3.3v out , i out = 3a, 5h lisn 89 69 51 dbv dbv dbv 1mhz narrowband conducted emissions 3mhz narrowband conducted emissions LTM8033i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the LTM8033mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 2.5v out efficiency 3.3v out efficiency 5v out efficiency typical performance characteristics t a = 25c, unless otherwise noted. output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 95 2500 3000 8033 g01 500 5v in 12v in 24v in 36v in output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 2500 3000 8033 g02 500 5.5v in 12v in 36v in 24v in output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 95 2500 3000 8033 g03 500 12v in 24v in 36v in
LTM8033 4 8033f typical performance characteristics bias current vs load current, 2.5v out bias current vs load current, 3.3v out bias current vs load current, 5v out bias current vs load current, 8v out bias current vs load current, 12v out bias current vs load current, 18v out 8v out efficiency 12v out efficiency 18v out efficiency t a = 25c, unless otherwise noted. output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 95 2500 3000 8033 g04 500 12v in 36v in 24v in output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 95 2500 3000 8033 g05 500 24v in 36v in output current (ma) 0 2000 1000 1500 50 efficiency (%) 55 65 60 80 75 70 85 90 95 2500 3000 8033 g06 500 36v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 10 5 20 15 35 30 25 40 45 50 2500 3000 8033 g07 500 36v in 5v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 20 10 40 30 60 50 70 80 2500 3000 8033 g08 500 36v in 5v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 10 5 20 15 30 25 35 40 2500 3000 8033 g09 500 36v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 10 30 20 60 50 40 70 80 90 2500 3000 8033 g10 500 12v in 24v in 36v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 10 30 20 60 50 40 70 80 2500 3000 8033 g11 500 24v in 36v in load current (ma) 0 2000 1000 1500 0 bias current (ma) 10 30 20 60 50 40 70 80 90 2500 3000 8033 g12 500 36v in
LTM8033 5 8033f typical performance characteristics input current vs output current 5v out input current vs output current 8v out input current vs output current 12v out input current vs output current 18v out minimum required input voltage vs output voltage, i out = 3a minimum required input voltage vs load current, 2.5v out input current vs input voltage output shorted input current vs output current 2.5v out input current vs output current 3.3v out t a = 25c, unless otherwise noted. input voltage (v) 020 10 0 input current (ma) 100 300 200 600 500 400 700 800 1000 900 30 40 8033 g13 output current (ma) 0 2000 1000 1500 0 input current (ma) 1000 500 1500 2000 2500 2500 3000 8033 g14 500 36v in 5v in 12v in 24v in output current (ma) 0 2000 1000 1500 0 input current (ma) 1000 500 1500 2000 2500 2500 3000 8033 g15 500 36v in 5.5v in 12v in 24v in output current (ma) 0 2000 1000 1500 0 input current (ma) 400 200 600 800 1400 1200 1000 1600 2500 3000 8033 g16 500 36v in 12v in 24v in output current (ma) 0 2000 1000 1500 0 input current (ma) 500 2000 1500 1000 2500 2500 3000 8033 g17 500 36v in 12v in 24v in output current (ma) 0 2000 1000 1500 0 input current (ma) 200 400 600 800 1600 1400 1200 1000 1800 2500 3000 8033 g18 500 36v in 24v in output current (ma) 0 2000 1000 1500 0 input current (ma) 200 400 600 800 1600 1400 1200 1000 1800 2500 3000 8033 g19 500 36v in output voltage (v) 010 0 input voltage (v) 5 10 15 20 35 30 25 40 15 8033 g20 5 load current (ma) 0 2000 1000 1500 3.0 input voltage (v) 3.2 3.4 4.2 4.0 3.8 3.6 4.4 2500 3000 8033 g21 500 to start, with run = v in to run or ss controlled start
LTM8033 6 8033f typical performance characteristics minimum required input voltage vs load current, 12v out minimum required input voltage vs load current, 18v out radiated emissions, 36v in , 24v out at 1.5a load radiated emissions, 36v in , 1.2v out at 3a load temperature rise vs load current, 2.5v out temperature rise vs load current, 3.3v out minimum required input voltage vs load current, 3.3v out minimum required input voltage vs load current, 5v out minimum required input voltage vs load current, 8v out t a = 25c, unless otherwise noted. load current (ma) 0 2000 1000 1500 3.0 input voltage (v) 3.5 4.0 5.5 5.0 4.5 6.0 2500 3000 8033 g22 500 to start, with run = v in to run run/ss controlled start load current (ma) 0 2000 1000 1500 3.0 input voltage (v) 3.5 4.0 7.5 7.0 6.5 5.5 5.0 6.0 4.5 8.0 2500 3000 8033 g23 500 to start, with run = v in to run or run/ss controlled start load current (ma) 0 2000 1000 1500 8.0 input voltage (v) 8.5 10.0 9.5 9.0 10.5 2500 3000 8033 g24 500 to start, with run = v in to run or run/ss controlled start load current (ma) 0 2000 1000 1500 to run or start 12 input voltage (v) 13 19 15 16 17 18 14 20 2500 3000 8033 g25 500 load current (ma) 0 2000 1000 1500 12 input voltage (v) 14 28 18 22 20 24 26 16 30 2500 3000 8033 g26 500 to start, with run = v in to run run/ss controlled start frequency (mhz) 30 814.8 716.7 618.6 520.5 226.2 324.3 422.4 0 10 30 20 60 50 40 70 80 912.9 1010 8033 g27 128.1 dbv/m frequency (mhz) 30 814.8 716.7 618.6 520.5 226.2 324.3 422.4 0 10 30 20 60 50 40 70 80 912.9 1010 8033 g28 128.1 dbv/m load current (ma) 0 2000 1000 1500 0 temperature rise (c) 35 10 20 15 25 30 5 40 2500 3000 3500 8033 g29 500 36v in 5v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 temperature rise (c) 35 10 20 15 25 30 5 40 2500 3000 8033 g30 500 36v in 12v in 24v in
LTM8033 7 8033f typical performance characteristics temperature rise vs load current, 18v out temperature rise vs load current, 5v out temperature rise vs load current, 8v out temperature rise vs load current, 12v out t a = 25c, unless otherwise noted. load current (ma) 0 2000 1000 1500 0 temperature rise (c) 35 10 20 15 25 30 5 45 40 2500 3000 8033 g31 500 36v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 temperature rise (c) 40 10 20 30 60 50 2500 3000 8033 g32 500 36v in 12v in 24v in load current (ma) 0 2000 1000 1500 0 temperature rise (c) 40 10 20 30 70 50 60 2500 3000 8033 g33 500 36v in 24v in load current (ma) 0 1000 1500 0 temperature rise (c) 40 10 20 30 70 50 60 2000 8033 g34 500 36v in
LTM8033 8 8033f pin functions v out (bank 1): power output pins. apply the output filter capacitor and the output load between these pins and gnd pins. gnd (a8, bank 2): tie these gnd pins to a local ground plane below the LTM8033 and the circuit components. return the feedback divider (r adj ) to this net. fin (bank 3): filtered input. this is the node after the input emi filter. apply the capacitor recommended by table 1. additional capacitance may be applied if there is a need to modify the behavior of the integrated emi filter; other- wise, leave these pins unconnected. see the applications information section for more details. v in (bank 4): the v in pin supplies current to the LTM8033s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. ensure that v in + bias is less than 56v. share (pin a6): tie this to the share pin of another LTM8033 when paralleling the outputs. otherwise, do not connect. adj (pin a7): the LTM8033 regulates its adj pin to 0.79v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation r adj = 394.21/(v out C 0.79), where r adj is in k. rt (pin b6): the rt pin is used to program the switching frequency of the LTM8033 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. sync (pin b8): this is the external clock synchronization input. ground this pin for low ripple burst mode ? operation at low output loads. tie to a stable voltage source greater than 0.7v to disable burst mode operation. do not leave this pin floating. tie to a clock source for synchronization. clock edges should have rise and fall times faster than 1s. see the synchronization section in the applications information section. pgood (pin b7): the pgood pin is the open-collector output of an internal comparator. pgood remains low until the adj pin is greater than 90% of the final regulation voltage. pgood output is valid when v in is above 3.6v and run/ss is high. if this function is not used, leave this pin floating. aux (pin g3): low current voltage source for bias. in many designs, the bias pin is simply connected to v out . the aux pin is internally connected to v out and is placed adjacent to the bias pin to ease printed circuit board routing. although this pin is internally connected to v out , it is not intended to deliver a high current, so do not connect this pin to the load. if this pin is not tied to bias, leave it floating. bias (pin g4): the bias pin connects to the internal power bus. connect to a power source greater than 2.8v and less than 25v. if the output is greater than 2.8v, connect this pin there. if the output voltage is less, connect this to a voltage source between 2.8v and 25v but ensure that v in + bias is less than 56v. run/ss (pin g8): pull the run/ss pin below 0.2v to shut down the LTM8033. tie to 2.5v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section.
LTM8033 9 8033f block diagram 8033 bd current mode controller run/ss share sync fin v in 499k 1f emi filter 15pf gnd rt pgood adj bias aux v out 8.2h
LTM8033 10 8033f operation the LTM8033 is a standalone nonisolated step-down switching dc/dc power supply that can deliver up to 3a of output current. it is an emc product; its radiated emissions are so quiet that it can pass the stringent requirements of en55022 class b as a stand alone product. this module provides a precisely regulated output voltage program- mable via one external resistor from 0.8v to 25v. the input voltage range is 3.6v to 36v. given that the LTM8033 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. as shown in the block diagram, the LTM8033 contains an emi filter, current mode controller, power switching ele- ment, power inductor, power schottky diode and a modest amount of input and output capacitance. the LTM8033 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate resistor value from the rt pin to gnd. an internal regulator provides power to the control cir- cuitry. the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external voltage higher than 2.8v, bias power will be drawn from the external source (typically the regulated output voltage). this improves efficiency. the run/ss pin is used to place the LTM8033 in shutdown, disconnecting the output and reducing the input current to less than 1a. to further optimize efficiency, the LTM8033 automatically switches to burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50a in a typical application. the oscillator reduces the LTM8033s operating frequency when the voltage at the adj pin is low. this frequency foldback helps to control the output current during start- up and overload. the LTM8033 contains a power good comparator which trips when the adj pin is at roughly 90% of its regulated value. the pgood output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pgood pin high. power good is valid when the LTM8033 is enabled and v in is above 3.6v. the LTM8033 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. the activation threshold of this function, however, is above 125c to avoid interfering with normal operation. thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device.
LTM8033 11 8033f applications information for most applications, the design process is straight for- ward, summarized as follows: ? look at table 1 and find the row that has the desired input range and output voltage. ? apply the recommended c in , c fin , c out , r adj and r t values. ? connect bias as indicated. as the integrated input emi filter may ring in response to an application of a step input voltage, a bulk capacitance may be applied between fin and gnd. see the hot-plug- ging safely section for details. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera- ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the LTM8033 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency (and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. note: an input bulk capacitance is required at either v in or fin. refer to the typical performance characteristics section for load conditions. capacitor selection considerations the c in , c fin and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap- plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir- cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the LTM8033s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the LTM8033 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high perfor- mance electrolytic capacitor at the output. it may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8033. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the LTM8033 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the devices rating. this situation can be easily avoided; see the hot-plugging safely section.
LTM8033 12 8033f applications information table 1. recommended component values and configuration (t a = 25c) v in v out c in c fin c out bias r adj f optimal r t(optimal) f max r t(min) 3.6v to 36v 0.8v 4.7f, 50v, 1206 10f, 50v, 1210 4 100f, 6.3v, 1210 2.8v to 25v 30m 230khz 182k 250khz 169k 3.6v to 36v 1v 4.7f, 50v, 1206 10f, 50v, 1210 4 100f, 6.3v, 1210 2.8v to 25v 1.87m 240khz 174k 285khz 147k 3.6v to 36v 1.2v 4.7f, 50v, 1206 10f, 50v, 1210 4 100f, 6.3v, 1210 2.8v to 25v 953k 255khz 162k 315khz 130k 3.6v to 36v 1.5v 4.7f, 50v, 1206 10f, 50v, 1210 4 100f, 6.3v, 1210 2.8v to 25v 549k 270khz 154k 360khz 113k 3.6v to 36v 1.8v 4.7f, 50v, 1206 10f, 50v, 1210 4 100f, 6.3v, 1210 2.8v to 25v 383k 285khz 147k 420khz 95.3k 4.1v to 36v 2.5v 4.7f, 50v, 1206 10f, 50v, 1210 3 100f, 6.3v, 1210 2.8v to 25v 226k 345khz 118k 540khz 71.5k 5.3v to 36v 3.3v 4.7f, 50v, 1206 10f, 50v, 1210 100f, 6.3v, 1210 aux 154k 425khz 93.1k 675khz 54.9k 7.5v to 36v 5v 4.7f, 50v, 1206 4.7f, 50v, 1206 100f, 6.3v, 1210 aux 93.1k 500khz 76.8k 950khz 36.5k 10.5v to 36v 8v 4.7f, 50v, 1206 1f, 50v, 1206 47f, 16v, 1210 aux 54.9k 700khz 52.3k 1.45mhz 20.5k 20v to 36v 12v 2.2f, 50v, 1206 1f, 50v, 1206 47f, 16v, 1210 aux 34.8k 850khz 41.2k 2.3mhz 9.09k 25.5v to 36v 18v 2.2f, 50v, 1206 open 22f, 25v, 1812 aux 22.6k 1.1mhz 29.4k 2.4mhz 8.25k 32.5v to 36v 24v 1f, 50v, 1206 open 22f, 25v, 1812 2.8v to 20v 16.5k 1.2mhz 25.5k 2.4mhz 8.25k 3.6v to 15v 0.8v 4.7f, 25v, 1206 10f, 16v, 1210 4 100f, 6.3v, 1210 v in 30m 230khz 182k 575khz 66.5k 3.6v to 15v 1v 4.7f, 25v, 1206 10f, 16v, 1210 4 100f, 6.3v, 1210 v in 1.87m 240khz 174k 660khz 56.2k 3.6v to 15v 1.2v 4.7f, 25v, 1206 10f, 16v, 1210 4 100f, 6.3v, 1210 v in 953k 255khz 162k 760khz 47.5k 3.6v to 15v 1.5v 4.7f, 25v, 1206 10f, 16v, 1210 4 100f, 6.3v, 1210 v in 549k 270khz 154k 840khz 42.2k 3.6v to 15v 1.8v 4.7f, 25v, 1206 10f, 16v, 1210 4 100f, 6.3v, 1210 v in 383k 285khz 147k 1.0mhz 34.0k 4.1v to 15v 2.5v 4.7f, 16v, 1206 10f, 16v, 1210 3 x 100f, 6.3v, 1210 v in 226k 345khz 118k 1.3mhz 23.7k 5.3v to 15v 3.3v 4.7f, 16v, 1206 10f, 16v, 1210 100f, 6.3v, 1210 aux 154k 425khz 93.1k 1.6mhz 17.8k 7.5v to 15v 5v 4.7f, 16v, 1206 4.7f, 50v, 1206 100f, 6.3v, 1210 aux 93.1k 500khz 76.8k 2.4mhz 8.25k 10.5v to 15v 8v 2.2f, 25v, 1206 open 47f, 16v, 1210 aux 54.9k 700khz 52.3k 2.4mhz 8.25k 9v to 24v 0.8v 4.7f, 25v, 1206 4.7f, 25v, 1206 4 100f, 6.3v, 1210 v in 30m 270khz 154k 360khz 113k 9v to 24v 1v 4.7f, 25v, 1206 4.7f, 25v, 1206 4 100f, 6.3v, 1210 v in 1.87m 285khz 147k 410khz 97.6k 9v to 24v 1.2v 4.7f, 25v, 1206 4.7f, 25v, 1206 4 100f, 6.3v, 1210 v in 953k 295khz 140k 475khz 82.5k 9v to 24v 1.5v 4.7f, 25v, 1206 4.7f, 25v, 1206 4 100f, 6.3v, 1210 v in 549k 310khz 133k 550khz 69.8k 9v to 24v 1.8v 4.7f, 25v, 1206 4.7f, 25v, 1206 3 100f, 6.3v, 1210 v in 383k 330khz 124k 620khz 60.4k 9v to 24v 2.5v 4.7f, 25v, 1206 4.7f, 25v, 1206 2 100f, 6.3v, 1210 v in 226k 345khz 118k 800khz 44.2k 9v to 24v 3.3v 4.7f, 25v, 1206 4.7f, 25v, 1206 100f, 6.3v, 1210 aux 154k 425khz 93.1k 1.0mhz 34.0k 9v to 24v 5v 4.7f, 25v, 1206 4.7f, 25v, 1206 100f, 6.3v, 1210 aux 93.1k 500khz 76.8k 1.4mhz 21.5k 10.5v to 24v 8v 2.2f, 25v, 1206 1f, 25v, 1206 47f, 16v, 1210 aux 54.9k 700khz 52.3k 2.2mhz 9.76k 20v to 24v 12v 2.2f, 25v, 1206 1f, 25v, 1206 47f, 16v, 1210 aux 34.8k 850khz 41.2k 2.3mhz 9.09k 18v to 36v 0.8v 1f, 50v, 1206 2.2f, 50v, 1206 4 100f, 6.3v, 1210 2.8v to 25v 30m 230khz 182k 250khz 169k 18v to 36v 1v 1f, 50v, 1206 2.2f, 50v, 1206 4 100f, 6.3v, 1210 2.8v to 25v 1.87m 240khz 174k 285khz 147k 18v to 36v 1.2v 1f, 50v, 1206 2.2f, 50v, 1206 4 100f, 6.3v, 1210 2.8v to 25v 953k 255khz 162k 315khz 130k 18v to 36v 1.5v 1f, 50v, 1206 2.2f, 50v, 1206 4 100f, 6.3v, 1210 2.8v to 25v 549k 270khz 154k 360khz 113k 18v to 36v 1.8v 1f, 50v, 1206 2.2f, 50v, 1206 3 100f, 6.3v, 1210 2.8v to 25v 383k 285khz 147k 420khz 95.3k 18v to 36v 2.5v 1f, 50v, 1206 2.2f, 50v, 1206 2 100f, 6.3v, 1210 2.8v to 25v 226k 345khz 118k 540khz 71.5k 18v to 36v 3.3v 1f, 50v, 1206 2.2f, 50v, 1206 100f, 6.3v, 1210 aux 154k 425khz 93.1k 675khz 54.9k 18v to 36v 5v 1f, 50v, 1206 1f, 50v, 1206 47f, 10v, 1210 aux 93.1k 500khz 76.8k 950khz 36.5k 18v to 36v 8v 2.2f, 50v, 1206 1f, 50v, 1206 47f, 16v, 1210 aux 54.9k 700khz 52.3k 1.45mhz 20.5k note: a bulk capacitor is required. do not allow v in + bias above 56v.
LTM8033 13 8033f applications information frequency selection the LTM8033 uses a constant frequency pwm architecture that can be programmed to switch from 200khz to 2.4mhz by using a resistor tied from the rt pin to ground. table 2 provides a list of r t resistor values and their resulting frequencies. table 2. switching frequency vs r t value switching frequency (mhz) r t value (k) 0.2 215 0.3 137 0.4 100 0.5 76.8 0.6 63.4 0.7 52.3 0.8 44.2 0.9 38.3 134 1.2 25.5 1.4 21.5 1.6 17.8 1.8 14.7 2 12.1 2.2 9.76 2.4 8.25 operating frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the LTM8033 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8033 if the output is overloaded or short-circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate other internal circuitry. for proper operation, it must be powered by at least 2.8v. if the output voltage is programmed to 2.8v or higher, bias may be simply tied to v out . if v out is less than 2.8v, bias can be tied to v in or some other voltage source. if the bias pin voltage is too high, the efficiency of the LTM8033 may suffer. the optimum bias voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency, but 4v to 5v works well in many applications. in all cases, ensure that the maximum voltage at the bias pin is less than 25v and that the sum of v in and bias is less than 56v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. load sharing two or more LTM8033 may be paralleled to produce higher currents. to do this, tie the v in , adj, v out and share pins of all the paralleled LTM8033 together. to ensure that paralleled modules start up together, the run/ss pins may be tied together as well. if the run/ss pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. current sharing can be improved by synchronizing the LTM8033s. an example of two LTM8033 configured for load sharing is given in the typical applications section. burst mode operation to enhance efficiency at light loads, the LTM8033 auto- matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the LTM8033 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. in addition, v in and bias quiescent currents are reduced to typically 20a and 50a respectively during the sleep time. as the load current decreases towards a
LTM8033 14 8033f applications information no-load condition, the percentage of time that the LTM8033 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. burst mode operation is enabled by tying sync to gnd. to disable burst mode operation, tie sync to a stable voltage above 0.7v. do not leave the sync pin floating. minimum input voltage the LTM8033 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. in addition, the input voltage required to turn on is higher than that required to run, and depends upon bias power whether run/ss is used. if bias is available before v out ramps up, the minimum v in voltage to start may be reduced. as shown in the typical performance characteristics section, the minimum input voltage to run a 3.3v output at light load is only about 3.6v, but, if run/ss is pulled up to v in , it takes 5.6v in to start. if the LTM8033 is enabled with the run/ss pin, the minimum voltage to start at light loads is lower, about 4.2v. similar curves detailing this behavior of the LTM8033 for other outputs are also included in the typical performance characteristics section. soft-start the run/ss pin can be used to soft-start the LTM8033, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc filter to cre- ate a voltage ramp at this pin. figure 2 shows the start-up and shutdown waveforms with the soft-start circuit. by choosing an appropriate rc time constant, the peak start- up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply at least 20a when the run/ss pin reaches 2.5v. frequency foldback the LTM8033 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short-circuit or output overload condition. if the LTM8033 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. this in turn limits the amount of energy that can be delivered to the load under fault. during the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. figure 2. to soft-start the LTM8033, add a resistor and capacitor to the run/ss pin v out 2v/div internal inductor current 1a/div v run/ss 2v/div 2ms/div 8033 f02 gnd run run/ss 0.22f 15k
LTM8033 15 8033f synchronization the internal oscillator of the LTM8033 can be synchro- nized by applying an external 250khz to 2mhz clock to the sync pin. do not leave this pin floating. ground the sync pin if the synchronization function is not used. when synchronizing the LTM8033, select an r t resistor value that corresponds to an operating frequency 20% lower than the intended synchronization frequency (see the frequency selection section). in addition to synchronization, the sync pin controls burst mode behavior. if the sync pin is driven by an external clock, or pulled up above 0.7v, the LTM8033 will not en- ter burst mode operation, but will instead skip pulses to maintain regulation instead. applications information figure 3. the input diode prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the LTM8033 runs only when the input is present 8033 f03 v in run/ss share v in v out v out aux bias adj rt LTM8033 sync gnd shorted input protection care needs to be taken in systems where the output will be held high when the input to the LTM8033 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode or-ed with the LTM8033s output. if the v in pin is allowed to float and the run/ss pin is held high (either by a logic signal or because it is tied to v in ), then the LTM8033s internal circuitry will pull its quiescent current through its internal power switch. this is fine if your system can tolerate a few milliamps in this state. if you ground the run/ss pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the LTM8033 can pull large currents from the output through the v in pin. figure 3 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input.
LTM8033 16 8033f applications information pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8033. the LTM8033 is neverthe- less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 4 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r adj and r t resistors as close as possible to their respective pins. 2. place the c in and c fin capacitors as close as possible to the v in , fin and gnd connections of the LTM8033. a haphazardly placed c fin capacitor may impair emi performance. 3. place the c out capacitors as close as possible to the v out and gnd connection of the LTM8033. figure 4. layout showing suggested external components, gnd plane and thermal vias 4. place the c in , c fin and c out capacitors such that their ground currents flow directly adjacent or underneath the LTM8033. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8033. 6. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 4. the LTM8033 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. pg r adj r t sync gnd share fin run/ss gnd v out gnd v in c out c in thermal vias to gnd LTM8033 bias aux c fin
LTM8033 17 8033f applications information hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8033. however, these capacitors can cause problems if the LTM8033 is plugged into a live supply (see application note 88 for a complete discus- sion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the v in pin of the LTM8033 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8033s rating and damaging the part. a similar phenomenon can occur inside the ltm8032 module, at the output of the integrated emi filter (fin), with the same potential of damaging the part. if the input supply is poorly controlled or the user will be plugging the LTM8033 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of control- ling input voltage overshoot is adding an electrolytic bulk capacitor to the v in or fin net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it can be a large component in the circuit. electromagnetic compliance the LTM8033 was evaluated by an independent nation- ally recognized test lab and found to be compliant with en 55022 class b: 2006 by a wide margin. sample graphs of the LTM8033s radiated emc performance are given in the typical performance characteristics section, while further data, operating conditions and test set-up are detailed in the electromagnetic compatibility test report, available on the linear technology website. conducted emissions requirements may be met by adding an appropriate input power line filter. the proper implementation of this filter depends upon the system operating and performance conditions as a whole, of which the LTM8033 is typically only a component, so conducted emissions are not ad- dressed at this level. thermal considerations the LTM8033 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance charac- teristics section can be used as a guide. these curves were generated by an LTM8033 mounted to a 40cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. the thermal resistance numbers listed in the pin con- figuration are based on modeling the module package mounted on a test board specified per jesd51-9 test boards for area array surface mount package thermal measurements. the thermal coefficients provided in this page are based on jesd 51-12 guidelines for reporting and using electronic package thermal information. for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance. to that end, the pin configuration typically gives four thermal coefficients: ? ja C thermal resistance from junction to ambient. ? jcbottom C thermal resistance from junction to the bottom of the product case. ? jctop C thermal resistance from junction to top of the product case. ? jb C thermal resistance from junction to the printed circuit board.
LTM8033 18 8033f while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confu- sion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased in the fol- lowing: ? ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. ? jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. as a result, this thermal re- sistance value may be useful for comparing packages but the test conditions dont generally match the users application. ? jctop is determined with nearly all of the component power dissipation flowing through the top of the pack- age. as the electrical connections of the typical module are on the bottom of the package, it is rare for an ap- plication to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. ? jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module and into the board, and is really the sum of the jcbottom and the thermal resistance of the bot- tom of the part through the solder joints and through a portion of the board. the board temperature is mea- sured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. the most appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. none of them can be individually used to accurately pre- dict the thermal performance of the product, so it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the LTM8033 data sheet. a graphical representation of these thermal resistances is given in figure 5. the blue resistances are contained within the module, and the green are outside. the die temperature of the LTM8033 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8033. the bulk of the heat flow out of the LTM8033 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, applications information 8033 f05 module regulator junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction a t case (bottom)-to-board resistance figure 5
LTM8033 19 8033f resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. the LTM8033 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. the activation threshold of this function, however, is above 125c to avoid interfering with normal operation. thus, it follows that prolonged or repetitive operation under a condition in which the thermal shutdown activates neces- applications information sarily means that the internal components are subjected to temperatures above the 125c rating for prolonged or repetitive intervals, which may damage or impair the reliability of the device. finally, be aware that at high ambient temperatures the internal schottky diode will have significant leakage cur- rent (see the typical performance characteristics section) increasing the quiescent current of the LTM8033. typical applications 8033 ta02 v in bias run/ss fin share v in 3.6v to 15v v out 0.8v 3a v out aux pgood rt LTM8033 4.7f sync gnd adj 10f 182k 30m f = 230khz 400f 8033 ta03 v in bias run/ss fin share v in 3.6v to 36v v out 1.8v 3a v out aux pgood rt LTM8033 4.7f 2.8v to 25v sync gnd adj 10f note: do not allow v in + bias to be greater than 56v. f = 285khz 147k 383k 400f 0.8v step-down converter 1.8v step-down converter
LTM8033 20 8033f typical applications 8033 ta05 v in share run/ss fin v in 7.5v to 36vdc v out 5v 3a v out aux bias pgood rt LTM8033 4.7f f = 500khz sync gnd adj 4.7f 76.8k 93.1k 100f 8033 ta04 v in share bias run/ss fin v in * 4.1v to 36v v out 2.5v 3a v out aux pgood rt LTM8033 4.7f 2.8v to 25v sync gnd adj 10f 118k 226k f = 345khz 300f note: do not allow v in + bias to be greater than 56v. * running voltage range. please refer to the applications information section for start-up details. 8033 ta06 v in share run/ss fin v in * 11v to 36v v out 8v 3a v out aux bias pgood rt LTM8033 4.7f sync gnd adj 1f 52.3k 54.9k f = 700khz 47f * running voltage range. please refer to the applications information section for start-up details. 2.5v step-down converter 5v step-down converter 8v step-down converter
LTM8033 21 8033f typical applications 8033 ta07 v in fin run/ss share v in * 4.8v to 36v v out 2.5v 5.8a v out aux bias pgood rt LTM8033 4.7f sync gnd adj 10f 137k 2.8v to 25v 113k 300f v in fin run/ss share v out aux bias pgood rt LTM8033 sync gnd adj 137k 4.7f optional synchronization clock * running voltage range. please refer to the applications information section for start-up details. note: synchronize the two modules to avoid beat frequencies, if necessary. otherwise, tie each sync to gnd. 10f current sharing two LTM8033 parts
LTM8033 22 8033f package description pin assignment table (arranged by pin number) pin name pin name pin name pin name pin name pin name a1 v out b1 v out c1 v out d1 v out e1 gnd f1 gnd a2 v out b2 v out c2 v out d2 v out e2 gnd f2 gnd a3 v out b3 v out c3 v out d3 v out e3 gnd f3 gnd a4 gnd b4 gnd c4 gnd d4 gnd e4 gnd f4 gnd a5 gnd b5 gnd c5 gnd d5 gnd e5 gnd f5 gnd a6 share b6 rt c6 gnd d6 gnd e6 gnd f6 gnd a7 adj b7 pgood c7 gnd d7 gnd e7 gnd f7 gnd a8 gnd b8 sync c8 gnd d8 gnd e8 gnd f8 gnd pin name pin name pin name pin name pin name g1 gnd j1 v in k1 v in l1 v in g2 gnd j2 v in k2 v in l2 v in g3 aux j3 v in k3 v in l3 v in g4 bias g5 gnd h5 gnd j5 gnd k5 gnd l5 gnd g6 gnd h6 gnd j6 gnd k6 gnd l6 gnd g7 gnd g8 run j8 fin k8 fin l8 fin package photograph
LTM8033 23 8033f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description lga package 76-lead (15mm 11.25mm 4.32mm) (reference ltc dwg # 05-08-1560 rev ?) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222 5. primary datum -z- is seating plane 6. the total number of pads: 76 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature detail b detail b substrate mold cap 0.270 C 0.370 3.95 C 4.05 bbb z z package top view 11.25 bsc 15.00 bsc 4 pad a1 corner x y aaa z aaa z package bottom view 3 pads see notes suggested pcb layout top view lga 76 0809 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin a1 8.89 bsc 1.27 bsc pad 1 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 5.080 3.810 3.810 5.080 6.350 2.540 2.540 1.270 1.270 0.000 symbol aaa bbb eee tolerance 0.15 0.10 0.05 detail a 0.635 0.025 75sq s y x eee detail c 0.635 0.025 75sq s y x eee f g h l j k e a b c d 21 43 5 6 7 4.22 C 4.42 detail a 12.70 bsc 8 detail c
LTM8033 24 8033f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0710 ? printed in usa related parts typical application part number description comments ltm8031 ultralow noise emc 1a module regulator en55022 class b compliant, 3.6v v in 36v; 0.8v v out 10v ltm8032 ultralow noise emc 2a module regulator en55022 class b compliant, 3.6v v in 36v; 0.8v v out 10v 3.3v step-down converter 8033 ta08 v in share run/ss fin v in 5.5v to 36vdc v out 3.3v 3a v out aux bias pgood rt LTM8033 4.7f sync gnd adj 10f 93.1k 154k f = 425khz 100f

▲Up To Search▲

Price & Availability of LTM8033

	To Download LTM8033 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .